rev.page date rev.page date description: dc/dc con v erter 1 of 3 08/2007 20050 sw 112 th ave . tua latin, oregon 97062 pho ne 503.612.2300 fax 503.612.2382 part number: vbsd2- sip series features isolated 2 w output temperature range: -40c~+85cunregulated high efficiency to 86% single volt age output small footprintdip p ackage style industry st andard pinout ul94-v0 p ackage no heat sink required 1k vdc isolationpower density 0.85 w/cm3 no external component required low cost descriptiondesigned to convert fixed volt - ages into an isolated volt age, the vbsd2-sip series is well suited for providing board-mount localsupplies in a wide range of appli - cations, including mixedanalog/digit al circuit s, test & measurement equip.,process/machine controls, dat a- com/telecom fields, etc...the semi-regulated output can be followed by 3-terminal regulators to provide output protection, in addition to output regulation. model input volt age output output current p ackage number nominal range volt age max. min. efficiency style vbsd2-s5-s5-sip 5 vdc 4.5~5.5 vdc 5 vdc 400 ma 40 ma 81% sip VBSD2-S5-S9-SIP 5 vdc 4.5~5.5 vdc 9 vdc 222 ma 23 ma 82% sip vbsd2-s5-s12-sip 5 vdc 4.5~5.5 vdc 12 vdc 167 ma 17 ma 84% sip vbsd2-s5-s15-sip 5 vdc 4.5~5.5 vdc 15 vdc 133 ma 14 ma 84% sip vbsd2-s12-s5-sip 12 vdc 10.8~13.2 vdc 5 vdc 400 ma 40 ma 82% sip vbsd2-s12-s9-sip 12 vdc 10.8~13.2 vdc 9 vdc 222 ma 23 ma 83% sip vbsd2-s12-s12-sip 12 vdc 10.8~13.2 vdc 12 vdc 167 ma 17 ma 85% sip vbsd2-s12-s15-sip 12 vdc 10.8~13.2 vdc 15 vdc 133 ma 14 ma 85% sip vbsd2-s24-s5-sip 24 vdc 21.6~26.4 vdc 5 vdc 400 ma 40 ma 83% sip vbsd2-s24-s9-sip 24 vdc 21.6~26.4 vdc 9 vdc 222 ma 23 ma 84% sip vbsd2-s24-s12-sip 24 vdc 21.6~26.4 vdc 12 vdc 167 ma 17 ma 86% sip vbsd2-s24-s15-sip 24 vdc 21.6~26.4 vdc 15 vdc 133 ma 14 ma 86% sip vbsd2-s24-s24-sip 24 vdc 21.6~26.4 vdc 24 vdc 83 ma 8 ma 86% sip
rev.page date description: dc/dc con v erter 2 of 3 08/2007 20050 sw 112 th ave . tua latin, oregon 97062 pho ne 503.612.2300 fax 503.612.2382 part number: vbsd2- sip series g eneral specifica tions short circuit protection <1 second temperature rise at full load 25c max, 15c typ. cooling free air convection operating temperature range -40c to +85c storage temperature range -55c to +125c soldering temperature 300c (1.5mm from case for 10 sec.) storage humidity range <95% case material plastic (ul94-v0) safety approved to ul60950-1 (e222736) mtbf >3,500,000 hrs. burn-in full load at +85c, for 4 hours at no-load and 4 hours at full load. isola tion specifica tions item test conditions min. typ. max unit s isolation volt age tested for 1 min. 1000 vdc insulation resist ance test at 500 vdc 1000 m dimensions (mm) pi n 12 4 6 +vin -vin -vout +vout sid e vi ew bott om v i ew 12 4 6 2. 54 12 4 6 no te: a ll p i ns on a 2.54mm pitch; all pin diameters are 0.50mm ; all dimensions in mm. typical characteristics ambient t emperature c ( ) output specifica tions item test conditions min. typ. max. unit s output power 0.2 2 w line regulation for v in change of 1% 1.2 % load regulation 10% to 100% full load 10 15 % output volt age accuracy see tolerance envelope graph temperature drif t @ 100% load 0.03 %/c output ripple 20 mhz bandwid th 100 150 mvp-p switching frequency full load, nominal input 75 khz note: 1. all specifications measured at t a=25c, humidity <75%, nominal input volt age and rated output load unless otherwise specified.
rev.page date description: dc/dc con v erter 3 of 3 08/2007 20050 sw 112 th ave . tua latin, oregon 97062 pho ne 503.612.2300 fax 503.612.2382 part number: vbsd2- sip series applica tion notes: - input filteringt o reduce the reflected ripple current and minimize emi, especially when the converter input is more than 2? away fromthe dc source, it is recommended to connect a low esr electrolytic cap acitor between v in and gnd. the values suggested are as shown in t able 1. if additional filtering is required, the cap acit ance may be increased, or exp anded to an lc network as shown in figure 1. input voltage external input capacitance 4.7 f 3.3, 5 v 12 v 2.2 f 15 v 2.2 f 24 v 1.0 f t able 1 vou t external ouput capacitance 4.7 f 3.3, 5 v 9 v 2.2 f 12 v 1.0 f 15 v 0.47 f 24 v 0.33 f t able 2 +vin -vin +vout -vout dc c l l dc c +vin -vin +vin -vin re g +vout -vout -vout +vout dc dc dc dc re g - minimum loadingthe converter needs a minimum of 10% loading to maint ain output regulation. operation under no-load conditions will not cause immediate damages but may reduce reliability , and cause performance not to meet specifications. - regulationw ith a semi-regulated design, the converter ? s output volt age varies with load current and will change proportionally to the input volt age. if regulated output is needed, an external regulator can be used as shown in figure 2. - protectionthe converter has minimal protection against input over- volt age or output over-load, and may be permanently damaged if exposed to these conditions. an input clamping device can be used for input volt age limiting. an input fuse or an output fuse also be used to protect against over-loading. - dual output s used as a single output the +v out and -v out can be used to obt ain a single output that is the sum of the two output s. in this case, the com pin shouldn?t be used. - external regulatoran external 3-terminal regulator can be connected to the output of the converter to achieve full regulation. make sure the converter ? s output volt age provides suf ficient head room for the regulator . an additional benefit is that the built-in protection features in the regulator , such as ocp , otp , etc, will protect the converter also. in a complimentory supply , a negative output regulator must be used to achieve the negative regulated output. - output filteringan output cap acitor is needed to meet output ripple requirement s as shown in t able 2.output cap acit ance may be increased for additional filtering, but should not exeed 10f orexp anded to an lc network as in figure 1.
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